Availability
Published
Product Code
DFR-2002-805
Release Date
Product Item Code
QUA-SM8250
Device Manufacturer
Qualcomm
Device Type
Applications Processor
Subscription
Compute
Channel
Logic - Digital Floorplan (IP)
Logic - Digital Floorplan
Qualcomm SM8250 Snapdragon 865 Application Processor TSMC N7P FinFET Process Digital Floorplan Analysis
This is a Digital Floorplan Analysis of the Qualcomm SM8250 Snapdragon 865 application processor TSMC N7P FinFET process.

This report contains the following detailed information:
  • Selected teardown photographs, package photographs, package X-rays, die markings, and die photographs
  • Scanning electron microscopy (SEM) plan-view micrographs showing the layout of the die at the levels including, fin/shallow trench isolation (STI), gate, contacts, and minimum pitch metals
  • Measurements of horizontal dimensions of some of the major layout features, particularly the pitch and track height of standard cells
  • Plan-view optical micrograph of the die delayered to the metal gate level
  • Identification of major functional blocks on a gate level die photograph
  • Table of functional block sizes and percentage die utilization
  • High-resolution top metal and gate level die photographs delivered in the CircuitVision Software
  • Cost of die, based on the manufacturing cost analysis of the observed process
 

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