This project presents a SoC Design Analysis of the Apple A14 Bionic APL1W01 application processor, built in TSMC's N5 process. This analysis is focused on the NPU area. We have assessed the standard cell architecture by extracting and locating in the NPU layout multiple standard cells. We have extracted the routing density of the NPU digital logic library. Process and BEOL stack-up and utilization have also been analyzed.