The Advanced CMOS Essentials (ACE) deliverable for logic microprocessor chips with finFETs comprises a concise analyst’s summary document highlighting observed critical dimensions and salient features supported by the following image folders:

• Downstream product teardown
• Package X-rays, top metal and poly die photographs, non-invasive optical photos of die features
• Transmission (TEM) and (SEM) bevel through the logic region and SRAM
• TEM and SEM cross section of the general device structure, back end of line (BEOL) (metals, dielectrics) and front end of line (FEOL) structures

The results of TEM-EDS and EELS analyses are included in the ACE summary document. The ACE deliverable provides timely competitive benchmarking information and enables cost-effective tracking of technical innovation across a breadth of competitors.

• Two TEM cross sections, orthogonal to the transistor gate fingers and fins showing the lower metals and dielectrics, transistor gates (NMOS and PMOS), fins, isolation, and other FEOL features.