HiSilicon Hi3670 Kirin 970 TSMC 10FF SoC Overhead Layout (Analog-Digital-Interconnect-Memory) Standard Cell Essentials

Product Code

SCE-1802-803

Release Date

17/07/2018

Availability

Published

Product Item Code

HSL-Hi3670

Device Manufacturer

HiSilicon Technologies Co. Ltd

Device Type

Applications Processor

Subscription

Compute

Channel

Logic - SoC Design Analysis (IP)

Logic - SoC Design Analysis

HiSilicon Hi3670 Kirin 970 TSMC 10FF SoC Overhead Layout (Analog-Digital-Interconnect-Memory) Standard Cell Essentials

This project presents a Standard Cell Essentials analysis of the HiSilicon Hi3670 Kirin 970 dummy structures. It is a collection of SEM montage images showing transition regions between an I/O IP block camera serial interface (CSI) and a digital logic block, showcasing dummy structures and relationship to system-on-chip (SoC) design rules used on the HiSilicon Hi3670 Kirin 970.

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