Samsung and SK hynix Are Racing to Build Memory You Can Share, Not Just Store
The coverage called it another capacity story. The bigger news is that CXL memory pooling just moved from forecast to production.
Each server hoards its own memory
Stranded memory: idle DRAM next door, but no way to share it.
GPU clusters borrow from a shared pool
Bursty agentic AI KV-cache workloads draw what they need, when they need it.
At OCP 2026, Samsung and SK hynix both detailed strategies for addressing the memory demands of agentic AI’s key-value cache workloads, with coverage framing the announcements as further evidence that memory suppliers are racing to keep pace with AI’s ever-expanding appetite for capacity.
It’s not how much memory. It’s how it gets shared.
The more interesting shift isn’t how much memory agentic AI needs — it’s that the industry just crossed a genuine architectural inflection point in how that memory gets shared. CXL memory pooling, which lets GPU clusters dynamically borrow DRAM from a shared pool rather than each accelerator hoarding its own dedicated capacity, has moved from forecast to production in 2026, running on next-generation Intel and AMD server platforms.
That’s not a minor technical footnote: pooling revenue is on pace to overtake traditional memory expansion by 2027 to 2028, arriving earlier than prior forecasts anticipated, and by 2031 pooling is expected to represent roughly half of all CXL-equipped servers.
The reason this matters more than a simple capacity story is what it solves: the “stranded memory” problem that has plagued multi-tenant cloud architectures for years, where one server sits on idle DRAM capacity while a neighboring server runs out, with no way to share the difference. Agentic AI’s KV-cache workloads are an ideal forcing function for this shift, since they require large, bursty, and unpredictable memory footprints that are poorly served by fixed, siloed allocation.
For Samsung and SK hynix, competitive positioning in this new mode isn’t just about who ships the most DRAM bits — it’s increasingly tied to process node leadership and advanced packaging capability, since CXL pooling modules demand the same kind of base-die co-design expertise already reshaping HBM competition.
“Memory capacity” is becoming a less useful unit of analysis than “memory architecture.”
For Executives
For anyone planning datacenter infrastructure or memory sourcing strategy, a server fleet that can pool memory across a fabric effectively has more usable capacity than its raw DIMM count suggests. Sourcing decisions that do not account for CXL readiness risk overbuying dedicated capacity to solve a problem pooling could address more efficiently.
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