Memory - NAND & DRAM Subscriptions

In more complex semiconductor chips, different functional blocks and the pathways that connect them are arranged for maximum efficiency and best physical fit. Floorplan analysis identifies the functional blocks, their purpose, their technology generation, and their relative cost to produce. It explores the placement of different functional blocks and resulting changes in performance.

• Process node and foundry identification
• Critical dimensions
• Functional block summary
• Stacked optical top metal and poly die photo delivered in CircuitVision. Includes calibrated measurement and annotations tools
• SEM cross-sectional and bevel imaging

Provides cross-technology and trend analysis as well as information on the performance of transistors used in DRAM through transistor characteristic analysis. Professionals from foundries, IDMs, and fabless organizations use this analysis to benchmark against competitors and to see how process differences impact performance between technologies.

• Universal curves for IOFF vs. ION and IOFF vs. ID, LIN derived from
  • 5 NMOS and 5 PMOS sub wordline driver transistors, across multiple VDD at 85°C
  • 5 NMOS and 5 PMOS sense amp transistors, across multiple VDD at 85°C
• For each universal curve data point
  • Transistor Characteristics: I_D, _SAT, I_D, _Lin, I_off, V_T, _Lin & V_T, _SAT, ΔV_GS, G_m, SS, DIBL
  • Output Characteristics

Focuses on the circuit schematic design of critical DRAM device metrics for a better understanding of peripheral design, functionality, structure, and layout to help accelerate R&D and fast-track the design learning curve.

• Circuit schematic diagram of sense amplifier
• Circuit schematic diagram of a sub wordline driver
• Detailed stacked SEM images of a delayered DRAM sense amplifier and sub wordline driver delivered in CircuitVision. Includes calibrated measurement and annotation tools

Highlights circuit innovation by providing full, transistor-level analysis on leading-edge DRAM memory circuits. TechInsights’ circuit analysis allows you to study the latest design trends and discover design elements that can help drive efficiency in your manufacturing process.

• 1 – Memory Array and Peripherals
• 2 – Address Path
• 3 – Data Path
• 4 – Control Blocks, Configuration and Test Block
• 5 – Voltage Generators System

In more complex semiconductor chips, different functional blocks and the pathways that connect them are arranged for maximum efficiency and best physical fit. Floorplan analysis identifies the functional blocks, their purpose, their technology generation, and their relative cost to produce. It explores the placement of different functional blocks and resulting changes in performance.

• Process Node and Foundry Identification
• Critical Dimensions
• Functional Block Summary
• Stacked optical top metal and poly die photo delivered in CircutVision which includes calibrated measurement tools
• SEM cross-sectional imaging

Highlights circuit innovation by providing full, transistor-level analysis on leading-edge NAND memory circuits. TechInsights’ circuit analysis allows you to study the latest design trends and discover design elements that can help drive efficiency in your manufacturing process.

• 1 – Memory Array and Peripherals
• 2 – Address Path
• 3 – Data Path
• 4 – Control Blocks, Configuration and Test Block
• 5 – Voltage Generators System

Full Circuit Analysis

• Full 2/year

TechInsights’ NAND Internal Waveform Analysis captures the specific steps, pulses, and amplitudes on select pins during program, read, and erase cycles of one flash die of a package. The content provides an innovative, cost-effective approach to delivering a subset of a waveform analysis report.

• Provides a Waveform summary PDF and raw waveform .sht files to enable the customer to perform further analysis and measurements

TechInsights’ Advanced Memory Process analysis provides an overview of chip technology, critical features, and dimensions. It provides analyst insights into technical trends and roadmaps, design technology interaction analyses, detailed explanations of process integrations, and next node predictions.

• Focused on leading edge NAND and DRAM memory technology
• SEM cross-sectional and bevel imaging
• TEM cross-sectional analysis with TEM EDS

Analysis Coverage

• Technical trend/roadmap by technology element
• Design technology interaction analysis
• Detailed explanation of process integrations
• Next node predictions
• Trend analysis
• Forecasting

Provides and tabulates a listing of process steps for a better understanding of how a chip is manufactured to help identify areas for process optimization.

Process Flow Analysis (PFA)

• Spreadsheets showing process, architecture, mask list, and integration-level process steps

Process Flow Full Emulation (PFF)

• Layout GDS fully decomposed into process layers
• 3D Emulation
• Synopsys Input (Route-Level Deck)*
  *Requires Synopsys license to view and modify

Analysis Coverage

• Cell Design technology interaction analysis
• Detailed explanation of process integration from wafer-in through wafer-out
• Process steps, materials, equipment type, unit process
• SEM and TEM cross-sectional and top-view images
• Layer annotations, specific process module, assumption
• Trend analysis

TechInsights’ NAND Transistor Characterization provides cross-technology analysis and information on the performance of transistors used in NAND devices through transistor characteristic analysis. It provides key information on competition’s/vendor’s performance with unbiased third party data.

• 10 types of transistors characterized at 85°C for each NAND device
• Transistor types:
  1. Peripheral High Voltage(HV) CSL Driver Transistor
  2. Page Buffer HV BLSLT NMOS Transistor
  3. Page Buffer HV BLGIDL NMOS Transistor
  4. XDEC NMOS Pass Transistor
  5. XDEC HV Depletion Transistor
  6. XDEC HV PMOS Transistor
  7. Page Buffer Mid Gox NMOS Transistor
  8. Page Buffer Mid Gox PMOS Transistor
  9. I/O Mid Gox NMOS Transistor
  10. I/O Mid Gox PMOS Transistor
• Test results for each transistor type will includes plots for: Transfer function, Output function, Body effect, Breakdown voltage, Transconductance (gm), Threshold voltage (VT), and Subthreshold swing (SS).
• Raw data files for all measured transistors included.